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All Discussions

Interrupt and terminate an output sequence
Triggering a Function Generator externally
How do I (or can I) set up mirny/kasli to have 125MHz SPI clock but 1 GHz RTIO?
artiq_coremgmt produces no output (log empty, config write hangs)
stabilizer use case for intensity stabilization of short-duration pulsed laser
unable to detect stabilizer usb connection
Should we move ARTIQ entirely from GitHub to git.m-labs.hk?
Requesting user feedback on displaying floats in the dashboard
Understanding Underflow Errors in Record DMA calls
Fastino initial voltage
Misoc repository archived
With Parallel control Two Fastino channel output
Fastino output very quickly signal
kasli question
Can not access to Vivado when building the ARTIQ
Phaser amplitude servo
Accessing a list inside a kernel takes >10x longer than writing to a list
Accessing variables inside a kernel causes RTIO underflow with input triggers?
Stabilizer firmware and software missmatch
Is mixing Proto rev 8/9 urukul CPLD firmware possible?

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