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All Discussions

Clarifications regarding the ARTIQ release model and AFWS
ARTIQ-8 released
NAC3 - New ARTIQ Compiler 3: Prealpha release
How to use this forum properly
How to implement a linear frequency ramp with Mirny?
Interaction with urukul causes hanging
Kasli on DHCP
How can i change the color map for image applets?
Anomalies in TTL input time tags
Connect ARTIQ (Kasli-SoC) to Computer
Programmatic restart of applets
Phase synchronization between Phaser Channels
"Datasets" missing in the ARTIQ Dashboard
Default argument `None` in kernel functions
AD9910: Mirror frequencies invert sign of phase accumulation
How do users choose folder to save data in?
Bandwidth of SUServo
Create a description file of SUServo
Alternative Python Execution Approach for Deterministic FPGA Applications?
Kasli-SoC RPC Throughput Performance Comparison

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