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All Discussions

Welcome to the M-Labs Forum
Clarifications regarding the ARTIQ release model and AFWS
ARTIQ-8 released
NAC3 - New ARTIQ Compiler 3: Prealpha release
How do I (or can I) set up mirny/kasli to have 125MHz SPI clock but 1 GHz RTIO?
artiq_coremgmt produces no output (log empty, config write hangs)
stabilizer use case for intensity stabilization of short-duration pulsed laser
unable to detect stabilizer usb connection
Should we move ARTIQ entirely from GitHub to git.m-labs.hk?
Requesting user feedback on displaying floats in the dashboard
Understanding Underflow Errors in Record DMA calls
kasli-soc v1.1rc2 not loading bootloader
Fastino initial voltage
Jitter in the output from Fastino DAC module
Misoc repository archived
With Parallel control Two Fastino channel output
SUServo with NAC3
Fastino output very quickly signal
kasli question
Can not access to Vivado when building the ARTIQ

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