Previously, we connected all of our DIO_SMA boards to the DRTIO master's EEM slots starting from slot 0. In that config, we successfully set their channels' directions like this:
from artiq.coredevice.kasli_i2c import port_mapping
KASLI_I2C_BOARD_TO_PORT_MAPPING = [port%8 for port in port_mapping.values()]
DIO_SMA_BUS_NUMBER = 0
DIO_SMA_BUS_ADDRESS = 0x7c
[...]
board = 0 # can be any value smaller than # DIO_SMA boards
if board < 8:
i2c_sw = self.i2c_switch0
else:
i2c_sw = self.i2c_switch1
i2c_addr = KASLI_I2C_BOARD_TO_PORT_MAPPING[board]
delay(1*us)
i2c_sw.set(channel = i2c_addr)
delay(1*us)
i2c_write_byte(
busno = DIO_SMA_BUS_NUMBER,
busaddr = DIO_SMA_BUS_ADDRESS,
data = 0,
)
delay(1*us)
i2c_sw.unset()
Now, we moved some DIO_SMA boards to a satellite starting from EEM slot 2. The above code crashes with:
Core Device Traceback:
Traceback (most recent call first):
File "<artiq>/coredevice/i2c.py", line 67, column 13, in artiq.coredevice.i2c.i2c_write_byte(..., ...)
raise I2CError("failed to ack bus address")
^
File "StartUpKernel.py", line 67, in ... artiq_run_StartUpKernel.StartUpKernel.init<artiq_run_StartUpKernel.StartUpKernel>(...) (RA=+0x20c)
i2c_write_byte(
File "StartUpKernel.py", line 116, in artiq_run_StartUpKernel.StartUpKernel.run(..., ...) (inlined)
self.init()
File "<artiq>/coredevice/i2c.py", line 0, in ?? (RA=+0x1bd4)
<unknown>
artiq.coredevice.exceptions.I2CError(0): failed to ack bus address
End of Core Device Traceback
Traceback (most recent call last):
File "/opt/m1/workspace/artiq-testing/development/09_StartUpKernel/run.py", line 65, in <module>
run()
File "/opt/m1/workspace/artiq-testing/development/09_StartUpKernel/run.py", line 59, in run
raise exn
File "/opt/m1/workspace/artiq-testing/development/09_StartUpKernel/run.py", line 50, in run
exp_inst.run()
File "/opt/m1/workspace/artiq/artiq/language/core.py", line 54, in run_on_core
return getattr(self, arg).run(run_on_core, ((self,) + k_args), k_kwargs)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
File "/opt/m1/workspace/artiq/artiq/coredevice/core.py", line 177, in run
self._run_compiled(kernel_library, embedding_map, symbolizer, demangler)
File "/opt/m1/workspace/artiq/artiq/coredevice/core.py", line 166, in _run_compiled
self.comm.serve(embedding_map, symbolizer, demangler)
File "/opt/m1/workspace/artiq/artiq/coredevice/comm_kernel.py", line 739, in serve
self._serve_exception(embedding_map, symbolizer, demangler)
File "/opt/m1/workspace/artiq/artiq/coredevice/comm_kernel.py", line 721, in _serve_exception
raise python_exn
artiq.coredevice.exceptions.I2CError: failed to ack bus address
Our device_db.py only contains these i2c-related entries:
device_db = {
"core": {
"type": "local",
"module": "artiq.coredevice.core",
"class": "Core",
"arguments": {
"host": core_addr,
"ref_period": 1e-09,
"analyzer_proxy": "core_analyzer",
"target": "cortexa9",
"satellite_cpu_targets": {}
},
},
[...]
"i2c_switch0": {
"type": "local",
"module": "artiq.coredevice.i2c",
"class": "I2CSwitch",
"arguments": {"address": 0xe0}
},
"i2c_switch1": {
"type": "local",
"module": "artiq.coredevice.i2c",
"class": "I2CSwitch",
"arguments": {"address": 0xe2}
},
}
Clearly, we are not talking to the appropriate i2c switches. How can we fix this?
Here is our system description file for the satellite with the DIO_SMA boards:
{
"target": "kasli_soc",
"hw_rev": "v1.1",
"base": "use_drtio_role",
"drtio_role": "satellite",
"enable_wrpll": false,
"sed_lanes": 32,
"min_artiq_version": "8.0",
"core_addr": "192.168.1.30",
"variant": "crate_cryo_rack_ao_dio_kasli_soc_v1.1_artiq_zynq_master_63157588bb8ed214bc9f24ade2d09b4ddefada03_drtio_satellite_wrpll_False_sed_32_periph_dio_sma_4_fastino_1_addr_192.168.1.30",
"peripherals": [
{
"type": "fastino",
"hw_rev": "v1.3",
"ports": [
0
]
},
{
"type": "dio",
"board": "DIO_SMA",
"hw_rev": "v1.4.1",
"ports": [
2
],
"bank_direction_low": "input",
"bank_direction_high": "input"
},
{
"type": "dio",
"board": "DIO_SMA",
"hw_rev": "v1.4.1",
"ports": [
3
],
"bank_direction_low": "input",
"bank_direction_high": "input"
},
{
"type": "dio",
"board": "DIO_SMA",
"hw_rev": "v1.4.1",
"ports": [
4
],
"bank_direction_low": "input",
"bank_direction_high": "input"
},
{
"type": "dio",
"board": "DIO_SMA",
"hw_rev": "v1.4.1",
"ports": [
5
],
"bank_direction_low": "input",
"bank_direction_high": "input"
}
]
}