Clocker Input Frequency

alessandro

I can't seem to find anything online about the input frequencies accepted by the Clocker board.

We would like to use it as a distribution amp for an external clock signal, as well as feeding the signal to the hardware in the crate. Is this supported?

sb10q

In general this sort of thing has to be derived from the schematics (https://github.com/sinara-hw/Clocker/releases/tag/v1.1rc2) because nobody has time to write documentation currently.
ADCLK950 DC-4.8GHz
Transformers TCM2-43X+ 10MHz-4GHz
...and there are no other components there that clearly have bandwidth limitations, so Clocker should do 10MHz-4GHz.

Yes Clocker is actually intended for use as a distribution amplifier like you describe.

dpn

Yep, we (Oxford) use Clocker to ship 10 MHz and 125 MHz around the basement. Two things you might want to consider:

If you need the low phase noise floor, consider low-loss coax for longer (10s of meters) runs between Clockers. RG-58 relatively quickly attenuates the high-frequency portion to where the slew rate is below the minimum for the ADCLK950, where the additive noise goes up quite a bit (see datasheet)>
You might want to spend a moment or two thinking about grounding to avoid upconverting low-level spurs. (Clocker allows you to float both input and outputs as a population option.)

alessandro

Thanks for your help. Now that I'm back in the lab and can actually try this I've run into some issues.

Is it possible to run the whole system with an external clock at 10 MHz so that the clocker's front panel outputs give 10MHz?

I tried this. I plugged a Rb referenced 10MHz signal (attenuated to 1.8v) into the clk SMA on the front of the kasli and set the rtio_clock setting to 'e' with artiq_coremgmt. Then I changed pll_n, pll_vco, and clk_div in our device_db apprpriately. Now I'm getting the error "PLL lock timeout". Should I try messing with the charge pump settings or something?

Alternatively, but less ideally for us, is there a way to feed 10MHz in and then have the SI5324 output 125 MHz? I was looking for some sort of artiq_coremgmt command to accomplish this but I couldn't find anything. This file the closest thing I could find but I'm not sure how to enable it.

rjo

rtio_clock=e with 10 MHz input will run RTIO at 10 MHz instead of the more typical 125 MHz. That's probably not what you want.
You may want to undo that and set up Kasli to use the 10 MHz external clock to derive 125 MHz RTIO clock internally.

I don't know how well the Urukuls can run from 10 MHz given the loop filter we have. Maybe someone else has tried that and has quantitative data. You certainly want to disable the default divide-by-4 on Urukul-AD9910 in that case.

If you use 10 MHz and pass it through clocker and the si5324 the jitter due to low slew at the clocker input typically isn't relevant compared to other jitter sources (e.g. PVT) due to the very small bandwidth.

alessandro

rjo I've set rtio_clock=i again and fed the 10 MHz into the Kasli. Now the output on the clocker is about 415 Hz off the Rb reference as measured with a referenced frequency counter. How do I get the Kasli to recognize that 10 MHz reference?

rjo

Who supplies you with binaries for your Kasli variant? Ask them to configure your variant to use 10 MHz external reference and flash those binaries onto the device.

alessandro

We supply our binaries. Our m-labs build subscription ran out before we had any hardware to plug into the crate.

In this comment you seem to suggest that there are a few predefined input frequencies and that recompilation of the firmware isn't required.

rjo

The predefined settings are used at firmware compile time.