Core Device Connection Errors

Hi,

I am a grad student at the University of Illinois, working in Brian DeMarco's trapped ion group. We are using an ARTIQ crate with Kasli 2.0 and have been setting our environment up a second time after reinstalling windows. We previously confirmed that all of the hardware on the crate works and have working ethernet and JTAG connections to the crate, but have run into issues connecting to the core device:

As a simple test I am trying to enable a TTL as described in the manual, which I have done before:

from artiq.experiment import *

class Tutorial(EnvExperiment):
    def build(self):
        self.setattr_device("core")
        self.setattr_device("ttl20")

    @kernel
    def run(self):
        self.core.reset()
        self.ttl20.output()
        for i in range(1000000):
            delay(2*us)
            self.ttl0.pulse(2 * us)

Running this returns the error:

(artiq-illinois) C:\Users\IonTrapper\PycharmProjects\ARTIQIonTrap\TestExamples>artiq_run TTLtest.py
Traceback (most recent call last):
  File "C:\ProgramData\Anaconda3\envs\artiq-illinois\lib\site-packages\artiq\master\worker_db.py", line 88, in get
    dev = _create_device(desc, self)
  File "C:\ProgramData\Anaconda3\envs\artiq-illinois\lib\site-packages\artiq\master\worker_db.py", line 27, in _create_device
    return device_class(device_mgr, **desc.get("arguments", {}))
  File "C:\ProgramData\Anaconda3\envs\artiq-illinois\lib\site-packages\artiq\coredevice\core.py", line 84, in __init__
    raise ValueError("Unsupported target")
ValueError: Unsupported target

The above exception was the direct cause of the following exception:

Traceback (most recent call last):
  File "C:\ProgramData\Anaconda3\envs\artiq-illinois\Scripts\artiq_run-script.py", line 9, in <module>
    sys.exit(main())
  File "C:\ProgramData\Anaconda3\envs\artiq-illinois\lib\site-packages\artiq\frontend\artiq_run.py", line 224, in main
    return run(with_file=True)
  File "C:\ProgramData\Anaconda3\envs\artiq-illinois\lib\site-packages\artiq\frontend\artiq_run.py", line 210, in run
    raise exn
  File "C:\ProgramData\Anaconda3\envs\artiq-illinois\lib\site-packages\artiq\frontend\artiq_run.py", line 201, in run
    exp_inst = _build_experiment(device_mgr, dataset_mgr, args)
  File "C:\ProgramData\Anaconda3\envs\artiq-illinois\lib\site-packages\artiq\frontend\artiq_run.py", line 187, in _build_experiment
    return get_experiment(module, args.class_name)(managers)
  File "C:\ProgramData\Anaconda3\envs\artiq-illinois\lib\site-packages\artiq\language\environment.py", line 243, in __init__
    self.build(*args, **kwargs)
  File "TTLtest.py", line 8, in build
    self.setattr_device("core")
  File "C:\ProgramData\Anaconda3\envs\artiq-illinois\lib\site-packages\artiq\language\environment.py", line 327, in setattr_device
    setattr(self, key, self.get_device(key))
  File "C:\ProgramData\Anaconda3\envs\artiq-illinois\lib\site-packages\artiq\language\environment.py", line 320, in get_device
    return self.__device_mgr.get(key)
  File "C:\ProgramData\Anaconda3\envs\artiq-illinois\lib\site-packages\artiq\master\worker_db.py", line 90, in get
    raise DeviceError("Failed to create device '{}'"
artiq.master.worker_db.DeviceError: Failed to create device 'core'

device_db.py is the latest version from here:
The crate can be pinged along the direct ethernet connection and artiq_coremgmt log returns:

(artiq-illinois) C:\Users\IonTrapper\PycharmProjects\ARTIQIonTrap\TestExamples>artiq_coremgmt --device-db device_db.py log   
[     0.000016s]  INFO(runtime): ARTIQ runtime starting...
[     0.003940s]  INFO(runtime): software ident 7.7961.a0070d43.beta;illinoismaster
[     0.011259s]  INFO(runtime): gateware ident 7.7961.a0070d43.beta;illinoismaster
[     0.018621s]  INFO(runtime): log level set to INFO by default
[     0.024330s]  INFO(runtime): UART log level set to INFO by default
[     0.141147s]  WARN(runtime::rtio_clocking): Using legacy rtio_clock setting ('i'). Falling back to default. This will be deprecated.
[     0.151789s]  INFO(runtime::rtio_clocking): using internal 125MHz RTIO clock
[     0.428280s]  INFO(board_artiq::si5324): waiting for Si5324 lock...
[     7.879420s]  INFO(board_artiq::si5324):   ...locked
[     7.884555s]  INFO(runtime::rtio_clocking::crg): Using internal RTIO clock
[     7.915723s]  INFO(runtime): network addresses: MAC=04-91-62-f1-ec-ea IPv4=192.168.1.75 IPv6-LL=fe80::691:62ff:fef1:ecea IPv6=no configured address
[     7.929358s]  WARN(board_artiq::drtio_routing): could not read routing table from configuration, using default
[     7.938074s]  INFO(board_artiq::drtio_routing): routing table: RoutingTable { 0: 0; 1: 1 0; 2: 2 0; 3: 3 0; }
[     7.966071s]  INFO(runtime::mgmt): management interface active
[     7.978215s]  INFO(runtime::session): accepting network sessions
[     7.991327s]  INFO(runtime::session): running startup kernel
[     7.995815s]  INFO(runtime::session): no startup kernel found
[     8.001608s]  INFO(runtime::session): no connection, starting idle kernel
[     8.008462s]  INFO(runtime::session): no idle kernel found
[     8.013859s]  INFO(runtime::rtio_mgt::drtio): [DEST#0] destination is up
[  2593.024462s]  INFO(runtime::mgmt): new connection from 192.168.1.5:52106
[  3265.278483s]  INFO(runtime::analyzer): connection from 192.168.1.5:52178
[  5213.813328s]  INFO(runtime::mgmt): new connection from 192.168.1.5:52961
[  5617.811035s]  INFO(runtime::mgmt): new connection from 192.168.1.5:52975
[  6199.223592s]  INFO(runtime::mgmt): new connection from 192.168.1.5:53015
[  7268.771209s]  INFO(runtime::mgmt): new connection from 192.168.1.5:53035

I believe I've correctly followed the manuals steps regarding Zadig; I can monitor the JTAG with PuTTY, and the crate and software versions match. Please let me know if any other information would be helpful and thanks in advance.