Hello,
I am trying to run a simple example experiment on an urukul where I output a single frequency. I am using gateware (6.7659.c6a7b8a8) and software (6.7670.1b3fa342).
The script I would like to run is below:
`from artiq.experiment import*
class Urukul_Frequency_Pulse(EnvExperiment):
def build(self):
self.setattr_device("core")
self.setattr_device("urukul0_dds") # this is the name given to the AD9910 device in my device_db.py rather than urukul0_ch0 for instance... not sure why that is
@kernel
def run(self):
self.core.reset()
self.urukul0_dds.cpld.init()
self.urukul0_dds.init()
delay(10 * ms)
freq = 100*MHz
amp = 1.0
attenuation= 1.0
self.urukul0_dds.set_att(attenuation)
self.urukul0_dds.sw.on()
self.urukul0_dds.set(freq, amplitude = amp)
delay(2*s)
self.urukul0_dds.sw.off() `
There are two clear problems I'm running into: first there is no sw_device assigned to my AD9910 in my device_db.py so I cannot call the method self.urukul0_dds.sw.on()
. When I try this I get the error
<synthesized>:1:1-1:60: error: host object does not have an attribute 'sw'
<artiq.coredevice.ad9910.AD9910 object at 0x7f9267116e50>
Looking in my device_db.py I see:
device_db["urukul0_dds"] = {
"type": "local",
"module": "artiq.coredevice.ad9910",
"class": "AD9910",
"arguments": {
"pll_n": 32,
"chip_select": 3,
"cpld_device": "urukul0_cpld"
}
}
There is no sw_device like "ttl_urukul0_sw0". Is this something I can add myself? How do I turn on output from the urukul without this switch device? The second issue comes at initialization of the ad9910 and cpld. If I simply run
`class Urukul_Frequency_Pulse(EnvExperiment):
def build(self):
self.setattr_device("core")
self.setattr_device("urukul0_dds")
@kernel
def run(self):
self.core.reset() #resets core device
self.urukul0_dds.cpld.init() #initialises CPLD on channel 1
self.urukul0_dds.init() `
I get
WARNING:artiq.coredevice.comm_kernel:Mismatch between gateware (6.7659.c6a7b8a8) and software (6.7670.1b3fa342) versions
Core Device Traceback (most recent call last):
File "urukul_single_freq.py", line 15, in __modinit__ (RA=+0x6e8)
self.urukul0_dds.cpld.init() #initialises CPLD on channel 1
File "<artiq>/coredevice/urukul.py", line 249, in ... artiq.coredevice.urukul.CPLD.init<artiq.coredevice.urukul.CPLD>(...) (RA=+0x16f8)
raise ValueError("Urukul proto_rev mismatch")
File "<artiq>/coredevice/urukul.py", line 249, column 17, in ... artiq.coredevice.urukul.CPLD.init<artiq.coredevice.urukul.CPLD>(...)
raise ValueError("Urukul proto_rev mismatch")
^
ValueError(0): Urukul proto_rev mismatch
Traceback (most recent call last):
File "/home/eurydice/miniconda3/envs/testbeam_v1.0/bin/artiq_run", line 10, in <module>
sys.exit(main())
File "/home/eurydice/miniconda3/envs/testbeam_v1.0/lib/python3.8/site-packages/artiq/frontend/artiq_run.py", line 224, in main
return run(with_file=True)
File "/home/eurydice/miniconda3/envs/testbeam_v1.0/lib/python3.8/site-packages/artiq/frontend/artiq_run.py", line 210, in run
raise exn
File "/home/eurydice/miniconda3/envs/testbeam_v1.0/lib/python3.8/site-packages/artiq/frontend/artiq_run.py", line 203, in run
exp_inst.run()
File "/home/eurydice/miniconda3/envs/testbeam_v1.0/lib/python3.8/site-packages/artiq/language/core.py", line 54, in run_on_core
return getattr(self, arg).run(run_on_core, ((self,) + k_args), k_kwargs)
File "/home/eurydice/miniconda3/envs/testbeam_v1.0/lib/python3.8/site-packages/artiq/coredevice/core.py", line 137, in run
self.comm.serve(embedding_map, symbolizer, demangler)
File "/home/eurydice/miniconda3/envs/testbeam_v1.0/lib/python3.8/site-packages/artiq/coredevice/comm_kernel.py", line 652, in serve
self._serve_exception(embedding_map, symbolizer, demangler)
File "/home/eurydice/miniconda3/envs/testbeam_v1.0/lib/python3.8/site-packages/artiq/coredevice/comm_kernel.py", line 644, in _serve_exception
raise python_exn
ValueError: Urukul proto_rev mismatch
Is this because of the software gateware mismatch? Any support would be greatly appreciated!
-jsch