Sinara

F
Problem encountered in setup nix develop environment
- Asking for helpARTIQSinara
- sb10q replied 2 days ago
3 replies
D
ARTIQ9/NAC3 gateware issue
- Asking for helpARTIQSinara
- occheung replied 2 days ago
1 reply
F
Difference of file size of the binary gateware and firmware
- Asking for helpARTIQSinara
- architeuthis replied 3 days ago
3 replies
D
Bug in Urukul DRG: output depends on power cycling Kasli (SoC)
- Asking for helpARTIQSinara
- dtsevas replied 7 days ago
1 reply
D
Bug in Urukul DRG: output amplitude is initialized to lower limit
- Asking for helpARTIQSinara
- dtsevas replied 9 days ago
3 replies
H
Trouble installing second dds (urukul ad9910)
- Asking for helpARTIQSinara
- srenblad replied 10 days ago
14 replies
D
Bug in new Urukul features
- Asking for helpARTIQSinara
- dtsevas started 10 days ago
0 replies
D
`proto_rev` in system description file required to use new Urukul features?
- Asking for helpARTIQSinara
- dtsevas replied 11 days ago
3 replies
J
Urukul Nominal Output Power Incorrect
- Asking for helpSinara
- JBLYONS replied 11 days ago
1 reply
D
"can't modify CPUCS: Broken pipe" on Digilent's JTAG-HS2 cable
- Asking for helpSinara
- dtsevas replied 17 days ago
7 replies
F
CPLD version problem
- Asking for helpARTIQSinara
- FENIX replied 25 days ago
4 replies
A
AFE card power questions (using with Shuttler)
- Asking for helpSinara
- ajras replied 21 Apr
5 replies
I
Booster stucked in reboot cycle
- Asking for helpSinara
- StefanK replied 18 Apr
11 replies
C
kernel stuck at initialization of phaser
- Asking for helpARTIQSinara
- ccv replied 7 Apr
2 replies
C
Help Avoiding RTIO Underflow During Fast TTL Edge Count
- Asking for helpARTIQSinara
- claytonho replied 2 Apr
1 reply
S
Urukul cfg_sw() turns off other channel(s)
- Asking for helpARTIQSinara
- simonschey replied 28 Mar
3 replies
S
Urukul RAM-mode delay between io_update Pulse and start of sweep
- Asking for helpSinara
- occheung replied 26 Mar
5 replies
Z
Increase maximum ouput amplitude of PServo?
- Asking for helpARTIQSinara
- zhdar started 21 Mar
0 replies
F
Phase noise of Mirny
- Asking for helpSinara
- sb10q replied 19 Mar
2 replies
D
Transfer values to master once and then access them from all kernel functions
- Asking for helpARTIQSinara
- dtsevas replied 28 Feb
4 replies

Problem encountered in setup nix develop environment

ARTIQ9/NAC3 gateware issue

Difference of file size of the binary gateware and firmware

Bug in Urukul DRG: output depends on power cycling Kasli (SoC)

Bug in Urukul DRG: output amplitude is initialized to lower limit

Trouble installing second dds (urukul ad9910)

Bug in new Urukul features

`proto_rev` in system description file required to use new Urukul features?

Urukul Nominal Output Power Incorrect

"can't modify CPUCS: Broken pipe" on Digilent's JTAG-HS2 cable

CPLD version problem

AFE card power questions (using with Shuttler)

Booster stucked in reboot cycle

kernel stuck at initialization of phaser

Help Avoiding RTIO Underflow During Fast TTL Edge Count

Urukul cfg_sw() turns off other channel(s)

Urukul RAM-mode delay between io_update Pulse and start of sweep

Increase maximum ouput amplitude of PServo?

Phase noise of Mirny

Transfer values to master once and then access them from all kernel functions