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D
AD9910: Mirror frequencies invert sign of phase accumulation
Asking for help
ARTIQ
Sinara
dtsevas
replied
21 hours ago
23
23 replies
F
Bandwidth of SUServo
Asking for help
ARTIQ
Sinara
dpn
replied
7 days ago
3
3 replies
F
Create a description file of SUServo
Asking for help
ARTIQ
Sinara
atse
replied
9 days ago
3
3 replies
D
ARTIQ 9 with NAC3 not providing error messages
Asking for help
ARTIQ
Sinara
debry
replied
14 days ago
3
3 replies
D
ARTIQ9/NAC3 gateware issue
Asking for help
ARTIQ
Sinara
debry
replied
15 days ago
2
2 replies
F
Problem encountered in setup nix develop environment
Asking for help
ARTIQ
Sinara
sb10q
replied
18 days ago
3
3 replies
F
Difference of file size of the binary gateware and firmware
Asking for help
ARTIQ
Sinara
architeuthis
replied
19 days ago
3
3 replies
D
Bug in Urukul DRG: output depends on power cycling Kasli (SoC)
Asking for help
ARTIQ
Sinara
dtsevas
replied
24 days ago
1
1 reply
D
Bug in Urukul DRG: output amplitude is initialized to lower limit
Asking for help
ARTIQ
Sinara
dtsevas
replied
a month ago
3
3 replies
H
Trouble installing second dds (urukul ad9910)
Asking for help
ARTIQ
Sinara
srenblad
replied
a month ago
14
14 replies
D
Bug in new Urukul features
Asking for help
ARTIQ
Sinara
dtsevas
started
a month ago
0
0 replies
D
`proto_rev` in system description file required to use new Urukul features?
Asking for help
ARTIQ
Sinara
dtsevas
replied
a month ago
3
3 replies
J
Urukul Nominal Output Power Incorrect
Asking for help
Sinara
JBLYONS
replied
a month ago
1
1 reply
D
"can't modify CPUCS: Broken pipe" on Digilent's JTAG-HS2 cable
Asking for help
Sinara
dtsevas
replied
16 May
7
7 replies
F
CPLD version problem
Asking for help
ARTIQ
Sinara
FENIX
replied
8 May
4
4 replies
A
AFE card power questions (using with Shuttler)
Asking for help
Sinara
ajras
replied
21 Apr
5
5 replies
I
Booster stucked in reboot cycle
Asking for help
Sinara
StefanK
replied
18 Apr
11
11 replies
C
kernel stuck at initialization of phaser
Asking for help
ARTIQ
Sinara
ccv
replied
7 Apr
2
2 replies
C
Help Avoiding RTIO Underflow During Fast TTL Edge Count
Asking for help
ARTIQ
Sinara
claytonho
replied
2 Apr
1
1 reply
S
Urukul cfg_sw() turns off other channel(s)
Asking for help
ARTIQ
Sinara
simonschey
replied
28 Mar
3
3 replies
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Sinara
AD9910: Mirror frequencies invert sign of phase accumulation
Bandwidth of SUServo
Create a description file of SUServo
ARTIQ 9 with NAC3 not providing error messages
ARTIQ9/NAC3 gateware issue
Problem encountered in setup nix develop environment
Difference of file size of the binary gateware and firmware
Bug in Urukul DRG: output depends on power cycling Kasli (SoC)
Bug in Urukul DRG: output amplitude is initialized to lower limit
Trouble installing second dds (urukul ad9910)
Bug in new Urukul features
`proto_rev` in system description file required to use new Urukul features?
Urukul Nominal Output Power Incorrect
"can't modify CPUCS: Broken pipe" on Digilent's JTAG-HS2 cable
CPLD version problem
AFE card power questions (using with Shuttler)
Booster stucked in reboot cycle
kernel stuck at initialization of phaser
Help Avoiding RTIO Underflow During Fast TTL Edge Count
Urukul cfg_sw() turns off other channel(s)
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