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All Discussions
Phase synchronization between Phaser Channels
"Datasets" missing in the ARTIQ Dashboard
Default argument `None` in kernel functions
AD9910: Mirror frequencies invert sign of phase accumulation
How do users choose folder to save data in?
Bandwidth of SUServo
Create a description file of SUServo
Alternative Python Execution Approach for Deterministic FPGA Applications?
Kasli-SoC RPC Throughput Performance Comparison
artiq.db failed to download in MSYS2
ARTIQ9/NAC3 gateware issue
Reading values of the ADC input
Problem encountered in setup nix develop environment
Bash scripting to for MSYS2 with ARTIQ?
Help on Nix Manager - package installs
Difference of file size of the binary gateware and firmware
Flashing Shuttler
Underflow Errors on Long (but slowish) Scans
Bug in Urukul DRG: output depends on power cycling Kasli (SoC)
Cannot Ping 192.168.1.75 and SFP Port Light Not Illuminating
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