I wish to use the TTLOut channel on my ARTIQ chassis to generate a periodic TTL pulse signal with frequency 100MHz and the high level ratio 0.25 for each period. I use the following code to complete the task:

`
from artiq.experiment import *
from artiq.language.core import *

class TTL_Demo(EnvExperiment):

    def build(self):
        self.setattr_device("core")
        self.setattr_device("ttl32")
        self.TTLOut = self.ttl32
        self.setattr_argument("Freq", NumberValue(100, scale=1, step=1, ndecimals=0, unit="MHz"))
        self.setattr_argument("Ratio", NumberValue(0.25, scale=1, step=0.01))

    def prepare(self):
	  self.period = 1 / self.Freq  # signal period, unit is us
	  self.high = self.period * self.Ratio  # High level time, unit is us
	  self.low = self.period * (1 - self.Ratio)  # Low level time, unit is us
	  self.h_mu = self.core.seconds_to_mu(self.high * 1e-6)
	  self.l_mu = self.core.seconds_to_mu(self.low * 1e-6)

    @kernel
    def run(self):
	  self.core.reset()
	  self.TTLOut.off()
	  while True:
		# self.core.break_realtime()
		self.TTLOut.pulse_mu(self.h_mu)
		delay_mu(self.l_mu)

Here, ttl32 is a TTLOut channel. However, when I run this code, when the break_realtime() is not applied, there is always an RTIOUnderflow exception occur when calling the function pulse_mu(). And if I apply break_realtime() which I shouldn't, there is no signal output on the oscilloscope monitoring the TTL output signal. How should I avoid this RTIOUnderflow exception and what did I do wrong that causes this exception?

Generate the clock signal in gateware using TTLClockGen.

    sb10q Thanks for your suggestion. Does it mean that the ordinary TTL channel should only be used to generated finite pulses for sequential control, and periodic pulse signal is most suitably generated by TTLClockGen? I checked the documentation of TTLClockGen, but I am not sure whether it is a completely different hardware from ordinary TTLInOut channels or any TTL hardware can be set to operate as TTLClockGen via software setting?

    Does it mean that the ordinary TTL channel should only be used to generated finite pulses for sequential control

    Yes.

    I am not sure whether it is a completely different hardware from ordinary TTLInOut channels or any TTL hardware can be set to operate as TTLClockGen via software setting?

    Same hardware but different gateware.