Hi,

I have created a ramp Generator using the DAC , and I am trying to read and plot the signal back using ADC through the artiq dashboard. The ramp generator code works when I submit in the dashboard ( displays the right waveform on scope), when I then submit the ADC code the dataset for the ADC does not show in the Datasets section . Both codes run on the same pipeline (main) and I was thinking that is why dataset blocks, but when I change the pipeline for the ADC code and submit it overrides and kills the DAC code( ramp generator), I think the problem is that both pipelines conflict over the core device, is there anyway to over come this ?

Yes, a core device can only run one kernel at any given time.
Supporting multitasking on the device, as would be required to implement what you want, would come with a performance hit for single-thread loads (even if we add CPU cores, due to synchronization and arbitration).

    sb10q

    Hi,

    Okay thank you for clarifying. How would I go about multitasking on the device ? There is very minimal documentation about implementing that.

    Thank you

      It's not implemented in ARTIQ, it is something that would take months for an experienced programmer, and as I said it comes with performance trade-offs - and other design issues (Zynq?).
      Do you really need to run several kernels at the same time?