Hello everyone!
I am trying to use the SPI protocol functionality encapsulated within ARTIQ to communicate with another FPGA board, but I am currently encountering some issues. When I use the read() function of the SPIMaster, the master board does not generate any signals (including the clock signal). However, when I use the write() function, the clock signal and output data are generated normally. Could you please advise on how I can correctly use the read() function to read data output from the slave device? The relevant code is as follows:
my JSON configuration
{
"target": "kasli_soc",
"variant": "master",
"hw_rev": "v1.0",
"base": "standalone",
"ext_ref_frequency": 10e6,
"peripherals": [
{
"type": "dio_spi",
"board": "DIO_SMA",
"ports": [0],
"spi": [
{
"name": "sma_spi",
"clk": 4,
"mosi": 5,
"miso": 6
}
],
"ttl": [
{
"name": "sma_in",
"pin": 0,
"direction": "input"
}
]
}
]
}
Simple code to read data via SPI
`from artiq.experiment import*
import artiq.coredevice.spi2 as spi2
class SPI_read_test(EnvExperiment):
def build(self):
self.setattr_device("core")
self.setattr_device("sma_spi0")
@kernel
def run(self):
self.core.break_realtime()
clock_freq = 10 * MHz
cs = 1
word_size = 32
self.sma_spi0.set_config(spi2.SPI_INPUT, word_size, clock_freq, cs)
while True:
data = self.sma_spi0.read()
delay(15*us)`
Channel 0 corresponds to MISO, and channel 1 corresponds to SCLK.