• GeneralARTIQ

  • Alternative Python Execution Approach for Deterministic FPGA Applications?

Hi everyone,

I’ve built a Python execution system that runs directly on a softcore processor implemented in FPGA logic. It’s not MicroPython or standard Python-on-Linux — it’s a fully pipelined Python engine with deterministic behavior, aimed at real-time embedded use. It’s already hitting sub-microsecond GPIO response times on basic boards.

I’m wondering if something like this could be useful for lab systems similar to ARTIQ — for example:
• Compiling Python down to FPGA-executable ops
• Tight coupling between Python logic and hardware peripherals (e.g. timers, GPIO, DAC)
• Fast feedback and deterministic execution, without a traditional OS

This isn’t a finished product yet, but it’s real and running. I’m exploring whether this could serve as a complementary or alternative tool for low-latency control.

Would anyone here be open to a brief chat, or willing to share thoughts on whether this would be relevant to your work?

Thanks so much in advance!

—Ron
(runpyxl.com/gpio if you’re curious — simple GPIO demo)

Did you publish the code and what is the license?

    sb10q

    Hi,

    Just to clarify: I haven’t published the code yet because I’m still evaluating strategic directions, including potential commercial applications. The prototype is real and functional, but I want to make sure future development aligns with actual needs rather than just technical exploration.

    I’m trying to understand:

    • Whether something like this could add value in ARTIQ-style or other similar applications.

    • If there are pain points it might help address

    • What features or behavior would matter most

    I’d really appreciate any perspective — even high-level. And if this overlaps with anyone’s work, I’d be happy to continue the conversation privately.

      sb10q

      Memory and execution models differ from CPython to reduce memory pressure and support predictable real-time behavior. Heap management is handled by the PS, and memory reclamation is designed to avoid stalls and maintain predictable performance under typical workloads.

        They also seem to have interesting theories about photons and interferometers.