Hi,

I am trying to simultaneously set multiple channels on the Fastino to certain voltages. My minimal code example looks like the following:

from artiq.coredevice import ad9910
from artiq.experiment import *
from artiq.language.environment import EnvExperiment
from artiq.frontend import artiq_run
from artiq.language.core import (delay, kernel, )


class Fastino_Single_Output(EnvExperiment):
    def build(self):
        self.setattr_device("core")
        self.setattr_device("fastino01")

    @kernel
    def run(self): 
        self.core.reset()
        self.core.break_realtime()
        self.fastino01.init()
        delay(200e-6)  
       
        data = [1 for _ in range(0, 32)]
        self.fastino01.set_group(0, data)
        delay(200e-6)


if __name__ == "__main__":
    artiq_run.run()
    pass

Executing this code gives a RTIO underflow error. Am I using the set_group() function correctly? Or is there another way to simultaneously set all channels on the Fastino?

Note: we also managed to execute set_group, but it does not set any voltages.

Please supply context and details (all versions involved, hardware, modifications, what do you do, what do you expect, what happens instead).

Also please indicate that you read the documentation about the Fastino driver at https://m-labs.hk/artiq/manual/core_drivers_reference.html#module-artiq.coredevice.fastino
and about what an RTIOUnderflow is and how it arises.

What's your log2_width in device_db and in gateware? Do they match and did you read the paragraphs in the documentation about it?

I had to adapt log2_width in device_db and gatware, and now it works!

The RTIOUnderflow error from before might be a bit misleading in this case. I would have expected a corresponding error message like "The function set_group() requires log2_width in device_db and gateway to be in the range 1 to 5."

Correct. There is no checking of gateware-driver compatibility. There is also no presence or compatibility check of Fastino at all yet.