Hello,

Does anyone have any information on whether the latencies between the different phaser channels (i.e. channel 0 and channel 1) are deterministic?
I know that latencies between the oscillators within a channel are deterministic and that frames and sample times have to be aligned to, but so far I don't think anything I've read has explicitly talked about the latencies between the channels.

I'm testing this by setting oscillator0 on both channel 0 and channel 1 to 85 MHz and 0.999 amplitude.
Immediately before setting the oscillators, I align to a frame.
Every time the experiment is run, the phaser is completely reinitialized.

So far, I've tried the following in different combinations, and none seem to work:

  • leaving the oscillator phase accumulators cleared until I set them
  • setting a fixed fifo_offset for the phaser DAC (per the phaser documentation)
  • using dac_sync() before the oscillators are set
  • clearing both DUC phase accumulators and strobing them right before setting the oscillators

Update - I think I sorted it out; was able to get a fixed phase delay between the different channel outputs each time.
The problem had to do with initializing the phaser each time I submitted the experiment.
After removing any phaser initialization and only setting the oscillator amplitude/phase, the phase delays between the channel outputs are fixed.