Kasli-SOC Set Up

RyanEverly

So when I run artiq_coremgmt log as the first thing after entering the artiq environment, I get:

(artiq) PS C:\Users\QC_Control\anaconda3\pkgs\artiq-7.8176.6fbfa12-0\site-packages\artiq> artiq_coremgmt log [ 0.000067s] INFO(runtime): NAR3/Zynq7000 starting... [ 0.005237s] INFO(runtime): gateware ident: yalemaster [ 0.015634s] INFO(libboard_zynq::i2c): PCA9548 detected [ 0.246836s] WARN(runtime::rtio_clocking): error reading configuration. Falling back to default. [ 0.255697s] WARN(runtime::rtio_clocking): Using default configuration - internal 125MHz RTIO clock. [ 0.264897s] INFO(runtime::rtio_clocking): using internal 125MHz RTIO clock [ 0.655628s] INFO(libboard_artiq::si5324): waiting for Si5324 lock... [ 2.366251s] INFO(libboard_artiq::si5324): ...locked [ 2.375996s] INFO(runtime::rtio_clocking): RTIO PLL locked [ 2.386747s] INFO(libboard_zynq::i2c): PCA9548 detected [ 2.422527s] INFO(runtime::comms): network addresses: MAC=fc-0f-e7-07-c4-30 IPv4=192.168.1.75 IPv6-LL=fe80::fe0f:e7ff:fe07:c430 IPv6: no configured address [ 2.440619s] INFO(libboard_artiq::drtio_routing): could not read routing table from configuration, using default [ 2.450869s] INFO(libboard_artiq::drtio_routing): routing table: RoutingTable { 0: 0; 1: 1 0; 2: 2 0; 3: 3 0; 4: 4 0; } [ 2.465444s] INFO(runtime::rtio_mgt::drtio): [DEST#0] destination is up [ 5.965091s] INFO(libboard_zynq::eth): eth: got Link { speed: S1000, duplex: Full } [ 128.778043s] INFO(runtime::mgmt): received connection

Next, I try running artiq_sinara_tester and artiq_run led0.py. They both still get the same error as above.
When I run artiq_coremgmt log, I now get the following:

esavkin

Just to update, this problem was solved by using the correct device_db file. It looks like the device_db used was targeted for Kasli, not the Kasli-SoC, which caused compiler to build experiments for the RISCV (Kasli), not for the ARM (Kasli-SoC).

lf_10

Where can one find that "correct device_db file"?

lf_10

lf_10 I'll reanswer myself: here

lf_10

I copied the example blink_forever from the link above and ran it with the same device_db.py (changing the ip address to mine) and the code seems to run. However, I do not see any LED blinking. I also tried to set the number of blinks (because from MSYS2 I cannot CTRL+C) and change the ON time just in case it was too fast for my eyes. No visible change. In the log, I get:
[ 1000.246568s] INFO(ksupport::kernel::core1): kernel starting [ 1000.252242s] INFO(ksupport::kernel::core1): kernel finished [ 1000.258338s] INFO(runtime::comms): peer closed connection [ 1004.171340s] INFO(runtime::mgmt): received connection

srenblad

lf_10 The channels in the device_db.py file need to correspond to the correct channels from your firmware build. Instead of using the device_db.py in the examples folder, use artiq_ddb_template -o device_db.py <variant>.json with the variant file used to build your core device gateware/firmware. See also this manual entry: https://m-labs.hk/artiq/manual/environment.html#the-device-database. Assuming that the crate was ordered from M-Labs, your lab would have already been provided the correct device_db.py and variant JSON file. If your lab has a subscription to the AFWS service, you should be able to get the variant JSON file from there (should it also be missing). Hope that helps!

lf_10

And what if I purchased the Kasli-SOC from Creotech directly? So far I just used the boot.bin that I installed via SD card from hydra (from here). I also added a settings.txt to fix the IP.

architeuthis

lf_10

See the manual section on system descriptions.

I believe that particular boot.bin is generated from kasli-soc-master.json. But unless you're actually running a DRTIO system you probably shouldn't be using a master configuration anyway.

lf_10

Thanx for the tip regarding the boot "master"! Now I changed it to "standalone".
Having followed the instructions, in windows, I managed to download all the requirements. However, I am facing now the following problem:
Vivado is downloaded and I am working on my directory where I cloned release-8 and (by using nix via wsl2) I ran:
nix build --print-build-logs --impure --expr 'let fl = builtins.getFlake "git+https://git.m-labs.hk/m-labs/artiq-zynq?ref=release-8"; in (fl.makeArtiqZynqPackage {target="kasli_soc"; variant="standalone"; json=./default.json;}).kasli_soc-standalone-sd'
It stops compiling in the end because it does not find Vivado:
File "/nix/store/1bsw1rvnmnffggadxx9xxx9yz3frl0vm-python3-3.11.9-env/lib/python3.11/site-packages/migen/build/xilinx/vivado.py", line 69, in _run_vivado kasli_soc-standalone-gateware> raise OSError("Subprocess failed")
Before downloading any Vivado version, I traced back what is used in the packages (as for Kasli-SOC at least it does not appear explicitly in the flake.nix file. If I am not wrong, it is Vivado 2022.2.
I could not find yet a file where I could add the location of the bin folder of my Vivado such that nix finds it when compiling.
Any tip?
Thx in advance.

architeuthis

Did you install Vivado outside of the default location? If so, you have to edit the (mainline ARTIQ) flake.nix, which to build for Zynq means cloning both repositories, ARTIQ and ARTIQ-Zynq. Change the inputs to the ARTIQ-Zynq flake to take your local copy of the ARTIQ source; there's a tip to this effect on the developing manual page. Then change the line in the ARTIQ flake that looks for Vivado in opt.

lf_10

Thx for the reply. This is what I did:
In flake.nix from ARTIQ:
vivado = pkgs.buildFHSEnv { name = "vivado"; targetPkgs = vivadoDeps; profile = "set -e; source /mnt/c/Xilinx/Vivado/2022.2/settings64.sh"; runScript = "vivado"; };
In flake.nix from ARTIQ-zynq:
'inputs.artiq.url = "path:/mnt/c/Users/lf/Documents/codes/hardware/artiq/artiq"
'

Following the instructions in the manual I typed nix flake update and nix develop after every flake.nix change and got messages showing my changes.

I also changed the build command:
nix build --print-build-logs --impure --expr 'let fl = builtins.getFlake "/mnt/c/Users/lf/Documents/codes/hardware/artiq/artiq-zynq"; in (fl.makeArtiqZynqPackage {target="kasli_soc"; variant="standalone"; json=./default.json;}).kasli_soc-standalone-sd'

I will continue looking for the origin of the error.

fsagbuya

lf_10 Have you also tried adding your custom vivado location to nix sandbox-paths (i.e. /mnt)? https://github.com/m-labs/artiq/blob/master/flake.nix#L518

lf_10

Thanks for the reply. I tried to substitute the extra-sandbox-paths="/opt" to the location of my vivado with what you suggest, as well as with /mnt/c, but I still get the same error.

lf_10

Hi again,
I decided to do it on Linux and installed everything as is suggested in the instructions. Given that all is the same, once I downloaded the artiq-zynq pachage (its release-8), I just executed nix develop and then nix build --print-build-logs --impure --expr 'let fl = builtins.getFlake "git+https://git.m-labs.hk/m-labs/artiq-zynq?ref=release-8"; in (fl.makeArtiqZynqPackage {target="kasli_soc"; variant="standalone"; json=./basic.json;}).kasli_soc-standalone-sd'

The error I get is the same:
kasli_soc-standalone-gateware> Fastino (EEM0) starting at RTIO channel 0x000000 kasli_soc-standalone-gateware> USER LED at RTIO channel 0x000001 kasli_soc-standalone-gateware> USER LED at RTIO channel 0x000002 kasli_soc-standalone-gateware> /etc/profile: line 37: /opt/Xilinx/Vivado/2022.2/settings64.sh: No such file or directory kasli_soc-standalone-gateware> Traceback (most recent call last): kasli_soc-standalone-gateware> File "/nix/store/a2iy41gccss952qhh8vnaivxjla29alq-gateware/kasli_soc.py", line 672, in <module> kasli_soc-standalone-gateware> main() kasli_soc-standalone-gateware> File "/nix/store/a2iy41gccss952qhh8vnaivxjla29alq-gateware/kasli_soc.py", line 668, in main kasli_soc-standalone-gateware> soc.build(build_dir=args.g) kasli_soc-standalone-gateware> File "/nix/store/vbv516vz6qi4m4wgavbdb1m1qwq7qnc4-python3-3.11.9-env/lib/python3.11/site-packages/migen_axi/integration/soc_core.py", line 169, in build kasli_soc-standalone-gateware> self.platform.build(self, *args, **kwargs) kasli_soc-standalone-gateware> File "/nix/store/vbv516vz6qi4m4wgavbdb1m1qwq7qnc4-python3-3.11.9-env/lib/python3.11/site-packages/migen/build/xilinx/platform.py", line 59, in build kasli_soc-standalone-gateware> return self.toolchain.build(self, *args, **kwargs) kasli_soc-standalone-gateware> ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ kasli_soc-standalone-gateware> File "/nix/store/vbv516vz6qi4m4wgavbdb1m1qwq7qnc4-python3-3.11.9-env/lib/python3.11/site-packages/migen/build/xilinx/vivado.py", line 224, in build kasli_soc-standalone-gateware> _run_vivado(build_name) kasli_soc-standalone-gateware> File "/nix/store/vbv516vz6qi4m4wgavbdb1m1qwq7qnc4-python3-3.11.9-env/lib/python3.11/site-packages/migen/build/xilinx/vivado.py", line 69, in _run_vivado kasli_soc-standalone-gateware> raise OSError("Subprocess failed") kasli_soc-standalone-gateware> OSError: Subprocess failed

I checked that the file settings64.sh exists. I also looked int /etc/profile and it only has 27 lines of code.

My artiq-zynq package is NOT in /opt, but this should not be the problem.

Any idea?

lf_10

I forgot to say that I am using Ubuntu 22.04.4 LTS

esavkin

Hi @lf_10 , try this not-really-official guide https://git.m-labs.hk/sinara-hw/assembly/src/branch/master/src/sw_sup/setup_build_pc.md#installation

lf_10

Step 5 solved the problem. Thank you very much!

sb10q

@esavkin You could also set up an apparmor profile for Nix and possibly merge it upstream. But, of course, that takes more work.