Digital output for SPI

vli

Hi,

I am going to serial program AD9915 evaluation board with digital outputs of artiq system. I can do it using ttl.on(), ttl.off(), delay() and ttl.pulse() combinations. Are there any more convenient ways of doing it? Where can I find some examples to see syntax if there are some?

sb10q

Please see https://forum.m-labs.hk/d/63-how-to-use-this-forum-properly - the tag should be "support" and not "tutorial".

There is a SPI core and infrastructure already, see how it is used with e.g. Urukul and Mirny in the ARTIQ code base.

vli

sb10q Could you please specify what is ARTIQ code base and where can I find it? Thanks in advance

sb10q

https://github.com/m-labs/artiq/

vli

I was not able to find anything useful. Could you please help me? I need to know the following:
1) What should I do to be able to write 32 bit to program external AD9915? I need a reference for the syntax and basic examples. I was able to find how to do it with ARDUINO.
2) How do I assign channels of Sampler to be SCLK, CS, SDIO, IO_UPDATE etc. Something like ttl0 -> CS, ttl1 -> SDIO etc.

Sorry for asking trivial questions. But I really could not understand it neither from manual nor from ARTIQ code base.

Also could you please suggest me where can I learn more to be able to use ARTIQ apart from the manual and forum. In other words, what basic knowledge is needed to avoid asking too many questions? Course names, books, anything that will help in a long term.

sb10q

vli What should I do to be able to write 32 bit to program external AD9915? I need a reference for the syntax and basic examples.

Add a SPI core to the FPGA design - driving the appropriate pins, add the SPI core channel to the RTIO core, add entries to the device database with the correct RTIO channel number for the SPI core, write AD9915 driver that talks to the DDS over RTIO and SPI core. That's how it is done for the Urukul or Mirny and there is no simpler way, the AD9915 is currently not supported, so you will have to write the code (or fund it and have it written).

vli How do I assign channels of Sampler to be SCLK, CS, SDIO, IO_UPDATE etc. Something like ttl0 -> CS, ttl1 -> SDIO etc.

Sampler has a full driver already, you do not need to drive its pins via manual TTLs. If you got your system from M-Labs or QUARTIQ, you should have received a device database with cards like Sampler already configured. If not then let me know.

vli

sb10q Add a SPI core to the FPGA design - driving the appropriate pins, add the SPI core channel to the RTIO core, add entries to the device database with the correct RTIO channel number for the SPI core, write AD9915 driver that talks to the DDS over RTIO and SPI core. That's how it is done for the Urukul or Mirny and there is no simpler way, the AD9915 is currently not supported, so you will have to write the code (or fund it and have it written).

Thanks for your replay. May be I was not clear with what I want to do. I want to use Sampler digital output channels to program AD9915 in serial mode. All what I need is to be able to use write() function on a particular channel (for example tt0) instead of using ttl0.on() delay() ttl0.off() 32 times to encode 32 bits of information. I guess that it should be much easier as spi2 is already configured for sampler as far as I understood from device_db.py

device_db.update({
    "spi_sampler0_adc": {
        "type": "local",
        "module": "artiq.coredevice.spi2",
        "class": "SPIMaster",
        "arguments": {"channel": 53}
    },
    "spi_sampler0_pgia": {
        "type": "local",
        "module": "artiq.coredevice.spi2",
        "class": "SPIMaster",
        "arguments": {"channel": 54}
    },
    "spi_sampler0_cnv": {
        "type": "local",
        "module": "artiq.coredevice.ttl",
        "class": "TTLOut",
        "arguments": {"channel": 55},
    },
    "sampler0": {
        "type": "local",
        "module": "artiq.coredevice.sampler",
        "class": "Sampler",
        "arguments": {
            "spi_adc_device": "spi_sampler0_adc",
            "spi_pgia_device": "spi_sampler0_pgia",
            "cnv_device": "spi_sampler0_cnv"
        }
    }
})

sb10q

vli All what I need is to be able to use write() function on a particular channel (for example tt0) instead of using ttl0.on() delay() ttl0.off() 32 times to encode 32 bits of information.

It does not work like this, please see the Sampler (or Urukul) driver source code and the SPI documentation.
https://m-labs.hk/artiq/manual-beta/core_drivers_reference.html?highlight=spi2#module-artiq.coredevice.spi2

The FPGA is handling the SPI transactions and the kernel does not toggle the lines bit-per-bit.