I currently try to understand the examples in AD9910 and its cpld codes and make sure we can develop our code. Yet I still have some confusion about methods.

such as the codes below:

@kernal
def configure_ram_mode(self, dds):
    self.core.break_realtime()
    dds.set_cfr1(ram_enable=0)
    self.cpld.io_update.pulse_mu(8)
    self.cpld.set_profile(0) 
    # Enable the corresponding RAM profile
    # Profile 0 is the default
    dds.set_profile_ram(start=0, end=len(self.asf_ram)-1,
                        step=250, profile=0, mode=RAM_MODE_CONT_RAMPUP)
    self.cpld.io_update.pulse_mu(8)
    dds.amplitude_to_ram(self.amp, self.asf_ram)
    dds.write_ram(self.asf_ram)
    self.core.break_realtime()
    dds.set(frequency=5*MHz, ram_destination=RAM_DEST_ASF)
    # Pass osk_enable=1 to set_cfr1() if it is not an amplitude RAM
    dds.set_cfr1(ram_enable=1, ram_destination=RAM_DEST_ASF)
    self.cpld.io_update.pulse_mu(8)

I didn't see the related explaination about classcpld.io_updatein artiq manual. And I don't sure whether what is the purpose to call cpld.io_update.pulse_mu and the difference between the RAM mode like 'RAM_MODE_CONT_RAMPUP' and the other modes.

Could someone provide some resource or explaination which would help me to understand these things?

Thank you for your precious help in advance.

    FENIX

    cpld.io_update is indeed not directly described in the documentation. You can however find it defined here and here in the source code.

    It will probably also help you to read through the ADD910 datasheet (link). This will tell you, e.g., on page 17, "The RAM modulation mode (see Figure 23) is activated via the RAM enable bit and assertion of the I/O_UPDATE pin (or a profile change)." On page 33 you can also find a description of the different RAM modes.


      architeuthis I do REALLY APPRECIATE for your help since I just learn electronics recently and I know little about that. Never thought AD9910 chip got its own manual which would introduce these and I thought that RAM MODE are sorts of things like ARTIQ feature or something like that haha. Just learnt a lesson that next time would see chip manual before working on related device.

      Thank you for your advice again