Our lab just recently bought a pre-assembled system composed of a few Sinara hardware modules and I'm running through the initial examples from the ARTIQ manual, but I'm having trouble using Direct Memory Access to increase the frequency of a ttl signal beyond the limit set by the CPU.
I'm running the following script:
`
from artiq.experiment import *
class Tutorial(EnvExperiment):
def build(self):
self.setattr_device("core")
self.setattr_device("core_dma")
self.setattr_device("ttl4")
@kernel
def record(self):
with self.core_dma.record("test_sequence"):
for i in range(2):
self.ttl4.pulse(100*ns)
delay(100*ns)
@kernel
def run(self):
self.core.reset()
self.record()
test_sequence_handle = self.core_dma.get_handle("test_sequence")
self.core.break_realtime()
while True:
self.core_dma.playback_handle(test_sequence_handle)`
and getting the following error/warnings
C:/msys64/mingw64/lib/python3.10/site-packages/numpy/core/getlimits.py:493: UserWarning: Signature b'\x00\xd0\xcc\xcc\xcc\xcc\xcc\xcc\xfb\xbf\xde\xc9n\x00\x00\x00' for <class 'numpy.float128'> does not match any known type: falling back to type probe function.
This warnings indicates broken support for the dtype!
machar = _get_machar(dtype)
====== LLVM IR (BROKEN) DUMP ======
LLVM IR (broken) dumped as C:/Users/JEAN-L~1/AppData/Local/Temp/tmppbq6vg_t.ll
Traceback (most recent call last):
File "C:\msys64\mingw64\bin\artiq_run-script.py", line 33, in <module>
sys.exit(load_entry_point('artiq===8.8254.8dc6902.beta', 'console_scripts', 'artiq_run')())
File "C:/msys64/mingw64/lib/python3.10/site-packages/artiq/frontend/artiq_run.py", line 226, in main
return run(with_file=True)
File "C:/msys64/mingw64/lib/python3.10/site-packages/artiq/frontend/artiq_run.py", line 212, in run
raise exn
File "C:/msys64/mingw64/lib/python3.10/site-packages/artiq/frontend/artiq_run.py", line 205, in run
exp_inst.run()
File "C:/msys64/mingw64/lib/python3.10/site-packages/artiq/language/core.py", line 54, in run_on_core
return getattr(self, arg).run(run_on_core, ((self,) + k_args), k_kwargs)
File "C:/msys64/mingw64/lib/python3.10/site-packages/artiq/coredevice/core.py", line 139, in run
self.compile(function, args, kwargs, set_result)
File "C:/msys64/mingw64/lib/python3.10/site-packages/artiq/coredevice/core.py", line 115, in compile
library = target.compile_and_link([module])
File "C:/msys64/mingw64/lib/python3.10/site-packages/artiq/compiler/targets.py", line 203, in compile_and_link
return self.link([self.assemble(self.compile(module)) for module in modules])
File "C:/msys64/mingw64/lib/python3.10/site-packages/artiq/compiler/targets.py", line 203, in <listcomp>
return self.link([self.assemble(self.compile(module)) for module in modules])
File "C:/msys64/mingw64/lib/python3.10/site-packages/artiq/compiler/targets.py", line 157, in compile
llparsedmod = llvm.parse_assembly(str(llmod))
File "C:/msys64/mingw64/lib/python3.10/site-packages/llvmlite/binding/module.py", line 25, in parse_assembly
raise RuntimeError("LLVM IR parsing error\n{0}".format(errmsg))
RuntimeError: LLVM IR parsing error
<string>:354:124: error: expected '('
define private void @"_Z39artiq.coredevice.dma.CoreDMA.get_handleI28artiq.coredevice.dma.CoreDMAEzz"({i32, i64, i32}* s
ret %".1", i8* %"ARG.ENV", %"I.artiq.coredevice.dma.CoreDMA"* %"ARG.self", {i8*, i32} %"ARG.name") uwtable personality
i32 (...)* @"__artiq_personality"!dbg !46
The warnings before the ====== LLVM IR (BROKEN) DUMP ====== message were printed when running the previous examples, but I was still able to turn the two leds on the front panel of the Kasli EEM controller ( Sinara 1124 Processor) on and off, and output TTL signals from the Sinara 2118 BNC TTL card. The parsing error has only occured when running this particular DMA example.
I'm using a PC running Windows 10. I installed ARTIQ via MSYS2 following the instructions on the beta manual since I was getting "InvalidArchiveError"s I couldn't resolve when installing via Conda.
What can I do to resolve this parsing error? Is there any additional information I can provide?
Thank you for your help.
