Hello,

I am trying to get an RF out of the phaser upconverter board. Previously I had made a post regarding the same issue and I thought the my mistake was because the frequency I was generating was too high for the oscilloscope. I switched over and measured with a spectrum analyzer and I was able to measure a frequency of 2.87 GHz. However, when I try to output a different RF value out of the phaser board by changing this line of code from 2.87 GHz to 200 MHz and measure again with the spectrum analyzer :

self.phaser0.channel[0].oscillator[0].set_frequency(200 * MHz)

I still only measure 2.87 GHz. I tried setting the frequency to other values and still I am not able to see any other frequency when I measure. I tried following this script from this post, but I am unable to measure frequencies between 1.251 GHz and 1.255 GHz just as the poster says they're able to get.

I also tried the artiq_sinara_tester.py script but I still cannot see any other frequency beside the 2.87GHz. For reference, I am using Spike spectrum analyzer to measure RF.

One thing I did was return the ftw value from the set_freqeuncy method under the PhaserOscillator class.

def set_frequency(self, frequency):
        """Set Phaser MultiDDS frequency.

        :param frequency: Frequency in Hz (passband from -10 MHz to 10 MHz,
            wrapping around at +- 12.5 MHz)
        """
        ftw = int32(round(frequency*((1 << 30)/(6.25*MHz))))
        self.set_frequency_mu(ftw)

When I set the frequency to 3 * MHz, the value I get returned is around 578 MHz. I thought I would measure 578 MHz on the Spike software, but I still do not see it. I have even set the range on Spike to range from 100 MHz to 3 GHz, with a step size oh 10 KHz. I am unsure what I am doing wrong.

Additionally, how do I which phaser gateware I have? Is it based on the version of artiq?

Thanks

17 days later

What version of Artiq are you using? What's the full code you're using to setup the phaser (setting duc frequency, oscillator freq, amplitude, etc.)? What's your device database for the phaser look like?

4 days later

It looks like the version is ARTIQ v7.8160. This is the full code: (it is the same as the second post that I referenced above):

from artiq.experiment import *

class Phaser(EnvExperiment):
    def build(self):
        self.setattr_device("core")
        self.setattr_device("phaser0")
    
    @kernel
    def run(self):
        self.core.reset()
        self.core.break_realtime()
        self.phaser0.channel[0].set_att(0 * dB)
        #    self.phaser0.channel[0].set_duc_frequency(0*MHz)
        self.phaser0.channel[0].oscillator[0].set_frequency(300 * MHz)
        self.phaser0.channel[0].oscillator[0].set_amplitude_phase(amplitude = 0.18)

I commented out the duc_frequency because I did not want to use it. In the device_db.py file, the only device initialized for the phaser is just phaser0:

device_db["phaser0"] = {
    "type": "local",
    "module": "artiq.coredevice.phaser",
    "class": "Phaser",
    "arguments": {
        "channel_base": 0x00000c,
        "miso_delay": 1,
    }
}
    13 days later

    jqt3 According to the code of the sinara tester (https://github.com/m-labs/artiq/blob/833fd8760e316ddd93f1202501994b872b4def3c/artiq/frontend/artiq_sinara_tester.py#L570C21-L570C21), it looks like the 2.875 GHz is the base frequency, and the set_frequency() and set_duc_frequency() are offsets of it. Also there are some limitations to the maximum frequencies you supply to the setters: https://m-labs.hk/artiq/manual/core_drivers_reference.html#artiq.coredevice.phaser.PhaserChannel.set_duc_frequency and https://m-labs.hk/artiq/manual/core_drivers_reference.html#artiq.coredevice.phaser.PhaserOscillator.set_frequency .

    I would suggest trying code from sinara tester and lowering the frequency offset to see if it's working.

    5 days later

    esavkin is correct about the base frequency for upconverter variant
    if you want within a few hundred MHz of 2.875 GHz, you can set negative frequency for the DUC, and similarly with the NCO.
    note - you'll have to adjust the dac configuration in either the dac34h84.py file or in the device_db.py file.

    to go lower, you'll have to reconfigure the TRF (the upconverter, which is the final stage in the phaser signal chain). the current trf372017.py file in artiq sets the base frequency to 2.875 GHz, but you can go as low as 300 MHz, and use negative frequencies to go lower.
    see the phaser github issues page for more details.
    to get an understanding of how to configure the TRF, the only real way to do so is to read and struggle through the datasheet (as I have), and play with the configuration until you get something that's stable at 300 MHz.

    for your convenience, here's the code we use to do so (you can simply add it to the end of your device_db.py file):

    
    # customize phaser configuration
    _phaser_dac_config = {
        'mixer_ena':            1,
        'nco_ena':              1
    }
    
    _phaser_trf_config = {
        'pll_div_sel':          0b01,
        'rdiv':                 3,
        'nint':                 29,
        'prsc_sel':             0,
        'cal_clk_sel':          0b1101,
    
        'lo_div_sel':           0b11,
        'lo_div_bias':          0b00,
        'bufout_bias':          0b00,
    
        'tx_div_sel':           0b11,
        'tx_div_bias':          0b00
    }
    
    # update phaser0 config options
    device_db["phaser0"]["arguments"]["dac"] =      _phaser_dac_config
    device_db["phaser0"]["arguments"]["trf0"] =     _phaser_trf_config
    device_db["phaser0"]["arguments"]["trf1"] =     _phaser_trf_config
    25 days later

    @jqt3 I apologize for the very late reply. We do basically the same thing as @claytonho. Our device database entry is

    device_db["phaser0"] = {
        "type": "local",
        "module": "artiq.coredevice.phaser",
        "class": "Phaser",
        "arguments": {
            "channel_base": 0x00001c,
            "miso_delay": 1,
            "clk_sel": 0,
            "tune_fifo_offset": False,
            "dac": {
                "fifo_offset": 1
            },
            "trf0": {
                # div8, gives f_trf = 312.5 MHz for Artiq 6's f_vco = 2.5 GHz (2500 / 8 = 312.5 MHz)
                # dive8 gives f_trf = 359.375 MHz for Artiq 7's f_vco = 2.875 GHz (2875 / 8 = 359.375 MHz)
                "tx_div_sel": 0b11
            },
            "trf1": {
                # div8, gives f_trf = 312.5 MHz for Artiq 6's f_vco = 2.5 GHz (2500 / 8 = 312.5 MHz)
                # dive8 gives f_trf = 359.375 MHz for Artiq 7's f_vco = 2.875 GHz (2875 / 8 = 359.375 MHz)
                "tx_div_sel": 0b11
            }
        }
    }

    the tx_div_sel bit is set to 11 (bin) = 3 (decimal) which gives a 23 = 8 factor reduction of the VCO frequency set to 2.875 GHz in Artiq 7. We want a DUC frequency around 222 MHz, so we do self.phaser.channel[0].set_duc_frequency((222 - 359.375) * MHz), Then the oscillators can be +/- 10 MHz from that DUC frequency.