Fastino initial voltage

Mikhail

I am using Fastino v1.2 with artiq 7.8176.6fbfa12. It is connected to kasli v1.1 via one EEM lane.

I've found out, the voltage on the Fastino card is non-zero on power-up (while the error led is red). I have checked all the channels (0-31) and the results are inconsistent. I am using startup_kernel in which I am setting all channels to 0V (using set_dac). Thus, after full initialization, the voltage is 0V. But the loading of the kasli takes 7s, in which -10V is emitted.

There are 3 types of behavior:

0V on start-up, for channels 9,13,15,19,21,22,26,30
-10V, but after full initialization (some load should be connected to the channel, i.e. multimeter), all other reboots with power down for less than 3 seconds result in 0V on start-up. For channels 1,2,3,5,8,12,16,28
-10V always on start-up. All other channels.

Strangely the groups of channels are not corresponding to the schematics of Fastino v1.2. Is the schematic wrong?

I have tied to use self.set_cfg(reset=0, afe_power_down=0, dac_clr=1, clr_err=0). This blocks the assignment of new voltages (until self.set_cfg(reset=0, afe_power_down=0, dac_clr=0, clr_err=0)) and helps to bring 0V to all lanes even after reboot, but this works only for one consecutive reboot. So this is still not a solution to the problem.

Additionally, I found the current limit to be 60mA instead of 30mA specified in the card schematics.

Is there a way to change the initialization voltage for good? Maybe by modification of the flashed code? Otherwise, the card is unusable for us.

Also, I couldn't find anything about physical user switches on the card (bottom right). What do they do and how to change them correctly? Could they help with this problem?

rjo

https://github.com/quartiq/fastino/issues/6 and the recommendations and suggestions there.

Mikhail

Hi rjo . Thanks for the reply.

The problem mentioned here was also not solved in the post you attached. But it seems the initial voltage on the power-up of the crate is solely controlled by the version of the DAC and could not be physically or programmatically changed. Is it correct?

rjo

No. The issue proposes to start with disabled AFE, then set the DAC. Worst case there could still be rail ramp transients (which will always be be a (hardware) problem) but it would then immediately go to a well-defined voltage.

Mikhail

Ah, thanks rjo .

I will try it in a few weeks after I am back in the lab. So as far as I got it, I should flash modified gatewere.

I have never done the modification of the gatewere. So far I only flashed kasli with the newer artiq version and expanded cards list.
Is there some tutorial on how to prepare and send a flash image for cards themself? So far I found this, with which I can create a flash image for the card (?) but I am not sure where could I modify the afe_power. Is it this line or that?

Or should I just modify this line in the init function?

rjo

To do it yourself you'll need to learn how this all works, how to set it up and how to write gateware. Explaining that is out of scope here.
Or contract somebody else to do it. The latter is how these things are developped.

Mikhail

Hi rjo

I managed to flash the Fastino with newest gatewere. This, as expected, didn't solve my problems.
Then I modified the fastino_phy.py (line 199)
platform.request("en_afe_pwr").eq(cfg.afe_pwr_n),
I remover ~ to invert the signal.
Then I created new gatewere (fastino.bin).
I have successfully flashed it to the card and now the card outputs 0.62V (acceptable for us) on startup. And after initialization with startup kernel (basic one) the voltage goes to 0.7V.

Unfortunately, I couldn't figure out how to make the afe_pwr back on in the script. I tried
self.set_cfg(reset=0, afe_power_down=0, dac_clr=0, clr_err=0)
But this did not have any effect.

During startup of the crate 2 LEDs are shining on the Fastino: FD and ER. After startup kernel it is only one LED FD.

Do you have some ideas? Am I missing something?

MichaelHartmann

I observed a similar problem: When calling the method init from the class Fastino (doc: https://m-labs.hk/artiq/manual-beta/_modules/artiq/coredevice/fastino.html) the voltage of channel 0 (maybe all channels, but only channel 0 tested) changes to -10V. The documentation, however, states:

It does not change set channel voltages and does not reset the PLLs or clock domains

The following code line in Fastino.init is to blame (link to line on github: https://github.com/m-labs/artiq/blob/master/artiq/coredevice/fastino.py#L84):
self.apply_cic(0xffffffff)

The behavior is unexpected and caused us a few days of work and destroyed two of our chips. It would be nice to either fix the documentation or change the behavior of Fastino.init().

rjo

As the note below the line you quote says, that transient is related to the firmware version. Do try updating it.

rjo

As you inverted it, do afe_power_down=1.

Mikhail

rjo
This I also tried, but, unfortunately, no effect.
I tried putting it in both build and run sections of the code (as separate attempts).

Or should I do it twice as in the init:
self.t_frame = int64(14*7*4) self.set_cfg(reset=0, afe_power_down=1, dac_clr=0, clr_err=1) delay_mu(self.t_frame) self.set_cfg(reset=0, afe_power_down=1, dac_clr=0, clr_err=0)

rjo

This may also require changes in the RTIO PHY.

Mikhail

Hi rjo. After a few weeks of the system being off (disconnecting the power supply) everything works as it should with:
afe_power_down=1
Don't know what was the problem directly after flashing.
The problem with the initial voltage is solved (still need to check for transients with the oscilloscope)

lf_10

Hi. I will ask my question here as it is similar to the discussion above:
I am using a kasli-soc v1.2 and a Fastino v1.2.1
After reading it, the simplest solution is to have a code to initialize everything, as you say (which is what I was going to do anyway). However, imagine that my channel output 1 is connected to something that only accepts 5V and by default the channel starts with 10V. I can set the outputs to 0 before connecting the device. Imagine that during the night the power goes off and then on. Then this channel will output 10V again and damage my device.

Having said this, I would like to know how the community faces this potential issue. Maybe, there is a way to launch a code automatically right after the device turns on or maybe, the new artiq release allows an extra line in the configuration .json file used to generate the boot.bin to solve the issue.

lf_10

Hi,
could someone who succeeded in following the steps explained in post 8 explain them a bit more? I could not find fastino_phy.py in the artiq package nor artiq-zynq.

srenblad

The fastino_phy.py being discussed is located here.

lf_10

So far I used the instructions to flash on a microSD card the firmware and gateware for the kasli-soc. I have not much knowledge on this topic, so I do not know how to connect these two points. Any tip on how to start?

zz_pi

Hi,
I have the same issue and I'm also using SD card to flash my kasli-soc. Does someone know how to do it or the first step?