Can we boot Kasli SoC master without having connected peripherals or satellites?

• We have three Kasli SoC v.1.1 devices and one of them is described by the following system description file, which we wrote based on artiq/coredevice/coredevice_generic.schema.json (release-7) and based on our hardware:

{
    "target": "kasli_soc",
    "variant": "m1_master",
    "hw_rev": "v1.1",
    "base": "master",
    "rtio_frequency": 125e6,
    "core_addr": "10.0.0.50",
    "peripherals": [
    {
        "type": "dio",
        "board": "DIO_SMA",
        "hw_rev": "v1.4.1",
        "ports": [0],
        "bank_direction_low": "input",
        "bank_direction_high": "input"
    },
    [...] # several more "DIO_SMA" boards
    ]
}

• We have compiled boot.bin from artiq-zynq (release-7) and from the above system description file following the instructions on Building and developing ARTIQ #Kasli-SoC, [...] (ARTIQ on Zynq)¶.
• We have formatted a 64 GB microSD card with a single partition and FAT32 with LBA (Logical Block Addressing) and we have copied onto it: /boot.bin and /config.txt with contents ip=10.1.0.10.
• We have inserted the microSD card into the Kasli SoC and we have set SW11 and SW12 to SD.
• We have not connected the Kasli SoC board's EEMs to anything! (Even though we specified several peripherals in the system description file.)
• We have not connected the Kasli SoC board's SFP0 through SFP3 to anything! (Even though we specified "base": "master" in the system description file.)

Questions:

1. If we supply power to the Kasli SoC now, will it boot, i.e. will the FPGA done LED light up?
2. If yes, how long do we have to wait before FPGA done lights up?
3. And will the board respond to pings via its ETH RJ45 port?
4. If yes, how long do we have to wait before the board responds to pings?
5. Can we damage anything on the Kasli SoC by supplying power to it without having connected its peripherals or its satellites? (We know that the EEMs are not hot-pluggable, don't worry.)