ARTIQ

Clarifications regarding the ARTIQ release model and AFWS
- GeneralARTIQ
- bass_j replied 19 hours ago
- ARTIQ follows a rolling release model, with beta, stable, and legacy channels. Different releases are saved as different branches on the M-Labs ARTIQ Git repository, and our s...
2 replies
ARTIQ-8 released
- AnnouncementsARTIQ
- sb10q started Jun 6, 2024
- We are releasing ARTIQ-8 today, packed with new features and scalability and performance improvements. DRTIO satellites are now able to run kernels ("subkernels") locally, in ...
0 replies
NAC3 - New ARTIQ Compiler 3: Prealpha release
- GeneralARTIQ
- sb10q replied Dec 18, 2022
- I am pleased to announce the Prealpha release of NAC3, a new compiler for ARTIQ. It is a major, backward-incompatible rewrite which features improved compilation speeds, a muc...
4 replies
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artiq_sinara_tester for satellite kasli
- Asking for helpARTIQ
- JBLYONS started 7 hours ago
0 replies
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Sipyco Subscriber: Why not expose a local copy of the backing_struct?
- Asking for helpARTIQ
- dtsevas replied 4 days ago
3 replies
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Kasli DRTIO satellite
- Asking for helpARTIQ
- srenblad replied 6 days ago
5 replies
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Applets Not Working
- Asking for helpARTIQ
- sb10q replied 10 days ago
1 reply
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Transfer values to master once and then access them from all kernel functions
- Asking for helpARTIQSinara
- dtsevas replied 11 days ago
4 replies
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EEPROM aliasing when using DRTIO
- GeneralARTIQSinara
- KlausZipfel replied 11 days ago
22 replies
E
Difficulty tracking cause of underflow in experiment
- Asking for helpARTIQ
- occheung replied 14 days ago
3 replies
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Kasli SoC `aux packet error (link down)` and `DrtioError(LinkDown)`
- Asking for helpARTIQSinara
- dtsevas replied 15 days ago
3 replies
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Control Stabilizer from Kasli
- GeneralARTIQSinara
- Philipp started 19 days ago
0 replies
F
Can not access to Vivado when building the ARTIQ
- Asking for helpARTIQMigen
- FENIX replied 22 days ago
9 replies
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device_db with DRTIO satellite
- Asking for helpARTIQ
- ajras replied 24 days ago
5 replies
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Inquiry about Bidirectional TTL in Output Mode
- Asking for helpARTIQSinara
- massirossi replied 25 days ago
7 replies
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How do users choose folder to save data in?
- GeneralARTIQ
- rmattish replied a month ago
5 replies
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Automated firmware building for the Kasli SoC
- Giving a tutorialARTIQSinara
- dtsevas replied 7 Feb
2 replies
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artiq-zynq compilation from December 2024 crashes?
- Asking for helpARTIQSinara
- sb10q replied 7 Feb
1 reply
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How do I flash `boot.bin` instead of `<afws_directory>`?
- Asking for helpARTIQ
- dtsevas replied 3 Feb
2 replies
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Gateware Mismatch Error
- Asking for helpARTIQ
- JBLYONS replied 31 Jan
7 replies

Clarifications regarding the ARTIQ release model and AFWS

ARTIQ-8 released

NAC3 - New ARTIQ Compiler 3: Prealpha release

artiq_sinara_tester for satellite kasli

Sipyco Subscriber: Why not expose a local copy of the backing_struct?

Kasli DRTIO satellite

Applets Not Working

Transfer values to master once and then access them from all kernel functions

EEPROM aliasing when using DRTIO

Difficulty tracking cause of underflow in experiment

Kasli SoC `aux packet error (link down)` and `DrtioError(LinkDown)`

Control Stabilizer from Kasli

Can not access to Vivado when building the ARTIQ

device_db with DRTIO satellite

Inquiry about Bidirectional TTL in Output Mode

How do users choose folder to save data in?

Automated firmware building for the Kasli SoC

artiq-zynq compilation from December 2024 crashes?

How do I flash `boot.bin` instead of `<afws_directory>`?

Gateware Mismatch Error