M-Labs Forum
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All Discussions
DRTIO disconnects
Kasli noise
GPTs for Artiq coding
STFT DUC Not works in Phaser Ch1
Fastino log2_width
Unexpected behavior with Mirny's set_frequency and set_output_power_mu
Fastino initial voltage
Zotino Output Trouble
Fetching/reading the core log in a central location?
Unexpected behavior with numpy arrays
Hybrid National instruments/ M_Labs hardware
Urukul underflow exception
Sinara 9805 Power amplifier Booster
Kasli SOC Bootloader
Type error when accessing attribute
Sinara Sampler Fast Mode Delay
SUServo -- Unable to get DDS output
Sampler reading values in-between -10 to 5V when input is 0-5V
TTL manual Override freezes ARTIQ box
Dashboard configuration
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