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Sinara
Transfer values to master once and then access them from all kernel functions
EEPROM aliasing when using DRTIO
Number of packets before reply from satellite
Which SFP speeds for different Kasli & Kasli SoC versions?
Kasli SoC `aux packet error (link down)` and `DrtioError(LinkDown)`
Ramp Function with SUServo
Control Stabilizer from Kasli
Looking for stabilizer mezzanine with AD9910 (or similar) DDS
Inquiry about Bidirectional TTL in Output Mode
DRTIO satellite: Kasli SoC vs. Kasli?
Booster stucked in reboot cycle
Automated firmware building for the Kasli SoC
artiq-zynq compilation from December 2024 crashes?
How do I obtain Vivado build logs for my Kasli SoC firmware?
Confusing with example codes
Arbitrary keys in system description file?
(PHASER) Simulatenous signals beyond the +-10MHz range of DUC frequency
Trying to generate some basic sine waves with phaser
Switch to Vivado 2024?
Upload device map to satellites?
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