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D
Unsigned 32-bit integers in kernel functions
Giving a tutorial
ARTIQ
The experiment below linearly maps a float between 0.0 and 1.0 to an unsigned 32-bit integer between 0 and 2**32-1. The conversion happens on a Kasli SoC, completely without R...
0
0 replies
D
Automated firmware building for the Kasli SoC
Giving a tutorial
ARTIQ
Sinara
Free to use, installable python package: https://github.com/dimitsev/sinara-firmware-compiler Summary: You write a few python lists that specify what Sinara crates you have an...
2
2 replies
D
How do I obtain Vivado build logs for my Kasli SoC firmware?
Giving a tutorial
Sinara
By using this python code: https://git.m-labs.hk/M-Labs/artiq-zynq/issues/355#issuecomment-13514
0
0 replies
MSYS2 ARTIQ Stable Update
Giving a tutorial
ARTIQ
Recently, version of the default Python in MSYS2 was updated to the 3.12, meaning older packages are getting updated to use new version as well. As previous ARTIQ (stable) pac...
0
0 replies
D
Using AD9910's digital ramp generator (DRG) on Urukul (working toy example)
Giving a tutorial
ARTIQ
Most Urukuls are based on the AD9910, which contains a digital ramp generator (DRG). The current AD9910 datasheet comprehensively explains how to program the DRG. In one speci...
0
0 replies
Creating a custom EEM module
Giving a tutorial
ARTIQ
Following original draft PR. You can create your own ARTIQ EEM module by adding following to your ARTIQ installation: from artiq.gateware.eem import _EEM, default_iostandard f...
1
1 reply
Frequency Chirp Pulse (& phase 0 centered) in STFT Pulsegen
Giving a tutorial
...umpy.exp(1.0j * m_pi * k**2 / F ) * (erf(b * (F + 2.0*k)) + erf(b * (F - 2.0*k))) class
Phaser
(EnvExperiment): def build(self): self.areal, self.aimag = self.get_coeffs_R(400....
0
0 replies
Developing Artiq on Windows (WSL2)
Giving a tutorial
ARTIQ
Sinara
The complete Artiq Toolchain is working on Windows using WSL. You can follow most of the instructions on https://m-labs.hk/artiq/manual/installing.html and https://m-labs.hk/a...
0
0 replies
J
Configuring a custom Kalsi Crate
Giving a tutorial
ARTIQ
Sinara
We have recently configured a custom Kasli crate using bare boards directly from TechnoSystems and I thought it might be useful to document how we got them up and running as w...
15
15 replies
P
No Ethernet connection to Kasli (UART: cannot initialize Si5324)
Giving a tutorial
Sinara
Hello, I wrote this post to explain the solution to a problem that has cost us some time. Hopefully this is of some help to someone. Summary: In our json configuration file, K...
0
0 replies
D
Issue finding shared object file
Giving a tutorial
I have just installed Artiq on a virtual machine through conda and am running the dashboard for the first time. When I try to scan the repository, it immediately throws an err...
3
3 replies
R
Creating a basic Panel / GUI as an Applet
Giving a tutorial
ARTIQ
Hello - I have recently started with ARTIQ. I have become familiar with the tutorials and have started exploring building a panel dashboard for our experiments. I have built a...
2
2 replies
J
microscope example
Giving a tutorial
ARTIQ
M-Labs wrote a simple tool called microscope for debugging Migen running on silicon. I'm looking for example code illustrating it's use with eg Kasli v2 -- emphasis on setting...
11
11 replies
Error when building developmental enviroment
Giving a tutorial
ARTIQ
I am trying to building a developmental environment to build my own custom gateware. The current ARTIQ version is version 7+ which requires the use of nix flakes however rever...
0
0 replies
Running mosquitto for MQTTv5 for stabiliser
Giving a tutorial
ARTIQ
I am trying to install mosquitto in docker as a MQTTv5 Broker to upload the firmware. However when I run the command given in the section for getting started then I get the fo...
0
0 replies
Analyzing RTIO slack with GtkWave
Giving a tutorial
ARTIQ
Judging from the survey results, it seems a number of people have trouble with RTIOUnderflow and want a graphical tool to display slack. Such functionality already exists thro...
6
6 replies
Rust kernels
Giving a tutorial
ARTIQ
I've been toying with the idea of using Rust as an alternative language for writing ARTIQ kernels. Here's a proof-of-concept for a few basic things (on ARTIQ-5): #![crate_name...
7
7 replies
F
Extra RTL files for Instance
Giving a tutorial
nMigen
I want to include existing VHDL RTL code in a nMigen project. I can use Instance for instantiating the block inside a nMigen. I don't know how to add the VHDL file(s) so they ...
1
1 reply
C
Porting a New Board To Migen
Giving a tutorial
Migen
In September 2017, I wrote a blog post that discusses how to seamlessly add a new FPGA development board to Migen. The idea is that porting a board to Migen is actually minima...
0
0 replies
V
Help for non experts in programming
Giving a tutorial
ARTIQ
Could anyone please post simplest possible examples of how to work with different Sinara modules. For non experts it would be much easier to adopt to new syntax and at least s...
4
4 replies
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Giving a tutorial
Unsigned 32-bit integers in kernel functions
Automated firmware building for the Kasli SoC
How do I obtain Vivado build logs for my Kasli SoC firmware?
MSYS2 ARTIQ Stable Update
Using AD9910's digital ramp generator (DRG) on Urukul (working toy example)
Creating a custom EEM module
Frequency Chirp Pulse (& phase 0 centered) in STFT Pulsegen
Developing Artiq on Windows (WSL2)
Configuring a custom Kalsi Crate
No Ethernet connection to Kasli (UART: cannot initialize Si5324)
Issue finding shared object file
Creating a basic Panel / GUI as an Applet
microscope example
Error when building developmental enviroment
Running mosquitto for MQTTv5 for stabiliser
Analyzing RTIO slack with GtkWave
Rust kernels
Extra RTL files for Instance
Porting a New Board To Migen
Help for non experts in programming