Sinara

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CPLD version problem
- Asking for helpARTIQSinara
- I would like to test the new DRG function in ARTIQ_Beta and I met this problem when I call method to set DRGCTL and DRGHOLD: NotImplementedError(0): This function is not imple...
2 replies
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Trouble installing second dds (urukul ad9910)
- Asking for helpARTIQSinara
- Hello, I have been recently attempting to install a second dds (Creotech Urukul ad9910) into my labs Artiq system. Previous to the 2nd instillation there was already a functio...
6 replies
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AFE card power questions (using with Shuttler)
- Asking for helpSinara
- I have a couple hardware questions about the AFE (Analog Front-End board). 1) What connector type is being used for power? A keyed M8? 2) Which pins should be at what voltages...
5 replies
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Booster stucked in reboot cycle
- Asking for helpSinara
- Hello, everyone! During setting up a booster, I tried to set it a static IP, to connect it via ethernet to the PC. After commands write ip-address 10.0.0.43 write netmask 255....
11 replies
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kernel stuck at initialization of phaser
- Asking for helpARTIQSinara
- Hi, we are trying to set up a baseband phaser from Creotech on our Kasli-SoC (Zynq7000). After connecting it to one of the ports and to the CLK on the Kasli-SoC, we flashed ou...
2 replies
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Help Avoiding RTIO Underflow During Fast TTL Edge Count
- Asking for helpARTIQSinara
- Hi all, first post here. Running with ARTIQ 7 on Kasli-EEM Controller. I'm hoping for a little help trying to understand how to read out a TTL channel very quickly as I believ...
1 reply
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Urukul cfg_sw() turns off other channel(s)
- Asking for helpARTIQSinara
- Hi, I have got a bit of a weird issue which I don't understand. Let's look at the following script (or the four scripts I packed into one for debugging-purposes): from artiq.e...
3 replies
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Urukul RAM-mode delay between io_update Pulse and start of sweep
- Asking for helpSinara
- Hi together, I am trying to get a frequency sweep out of my Urukul AD9910. I am using RAM-Mode and everything seems to work kind of nicely. Here is a snippet of my code, it is...
5 replies
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Increase maximum ouput amplitude of PServo?
- Asking for helpARTIQSinara
- Hi all, The servo feature of the Phaser is limiting its maximum output to 1/4th of maximum DAC output. As far as I understand, that is due to the fact that the filter output i...
0 replies
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Phase noise of Mirny
- Asking for helpSinara
- We measured the phase noise of Mirny output at 845 MHz. A obvious noise peak at 1 kHz and its harmonics were found. Such low frequency noise would sabotage our coherence time ...
2 replies
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Transfer values to master once and then access them from all kernel functions
- Asking for helpARTIQSinara
- Question Is there a way to load an experimental parameter and its value (e.g. {"MOT_frequ" : 180e6}) into the memory of the Kasli SoC master at run-time (e.g. by calling an @r...
4 replies
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EEPROM aliasing when using DRTIO
- GeneralARTIQSinara
- I have Urukul cards on a master and a satellite. They have synchronization enabled and I am trying to store information in the EEPROM for io_update_delay and sync_delay_seed. ...
22 replies
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Number of packets before reply from satellite
- Asking for helpSinara
- My Kasli SoC master reports: [ 11.150980s] INFO(runtime::rtio_mgt::drtio): [LINK#0] remote replied after 33 packets I have noticed that the above number of packets stays rough...
0 replies
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Which SFP speeds for different Kasli & Kasli SoC versions?
- Asking for helpSinara
- Assuming money is irrelevant, what are the optimal choices of optical SFP transceiver and optical fiber patch cable to connect a Kasli or Kasli SoC master to its satellites? A...
4 replies
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Kasli SoC `aux packet error (link down)` and `DrtioError(LinkDown)`
- Asking for helpARTIQSinara
- The problem: artiq_coremgmt -s 0 log succeeds, but artiq_coremgmt -s 1 log fails with OSError: Incorrect reply from device: Reply.Error (expected Reply.LogContent) and the fol...
3 replies
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Ramp Function with SUServo
- Asking for helpSinara
- Hi everyone, We're trying to implement a ramping function to slowly decrease the power of our DDS signal over 100µs, but we're encountering an issue where we don't observe any...
1 reply
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Control Stabilizer from Kasli
- GeneralARTIQSinara
- Has there been any work done on controlling the Stabilizer from the Kasli through the EEM connector? I only see some GPIO definitions in the firmware. How would one implement ...
0 replies
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Looking for stabilizer mezzanine with AD9910 (or similar) DDS
- Asking for helpSinara
- Hi all, reaching out to the community with a question. I am aware of the stabilizer mezzanines listed here https://github.com/sinara-hw/Stabilizer/wiki#afe-mezzanines, but I w...
7 replies
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Inquiry about Bidirectional TTL in Output Mode
- Asking for helpARTIQSinara
- I was testing the bidirectional TTL on my variant. When I set ttl0 to input mode, everything worked as expected. However, when I switched it to output mode and attempted to ge...
7 replies
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DRTIO satellite: Kasli SoC vs. Kasli?
- Asking for helpSinara
- The Kasli SoC is much stronger than the Kasli in several metrics, as explained in: Lam et al., Combining processing throughput, low latency and timing accuracy in experiment c...
2 replies

CPLD version problem

Trouble installing second dds (urukul ad9910)

AFE card power questions (using with Shuttler)

Booster stucked in reboot cycle

kernel stuck at initialization of phaser

Help Avoiding RTIO Underflow During Fast TTL Edge Count

Urukul cfg_sw() turns off other channel(s)

Urukul RAM-mode delay between io_update Pulse and start of sweep

Increase maximum ouput amplitude of PServo?

Phase noise of Mirny

Transfer values to master once and then access them from all kernel functions

EEPROM aliasing when using DRTIO

Number of packets before reply from satellite

Which SFP speeds for different Kasli & Kasli SoC versions?

Kasli SoC `aux packet error (link down)` and `DrtioError(LinkDown)`

Ramp Function with SUServo

Control Stabilizer from Kasli

Looking for stabilizer mezzanine with AD9910 (or similar) DDS

Inquiry about Bidirectional TTL in Output Mode

DRTIO satellite: Kasli SoC vs. Kasli?